The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2017

Filed:

Jul. 11, 2016
Applicant:

Via Alliance Semiconductor Co., Ltd., Shanghai, CN;

Inventors:

G. Glenn Henry, Austin, TX (US);

Dinesh K. Jain, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 12/0875 (2016.01); G11C 17/16 (2006.01); G06F 3/06 (2006.01); G06F 9/44 (2006.01); G06F 9/445 (2006.01); G06F 12/06 (2006.01); G06F 12/0806 (2016.01); G11C 17/18 (2006.01); G11C 29/00 (2006.01); G06F 11/10 (2006.01); G06F 12/0802 (2016.01); G11C 29/52 (2006.01); G06F 12/128 (2016.01); G06F 1/24 (2006.01); G06F 12/084 (2016.01); G06F 12/0811 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0875 (2013.01); G06F 1/24 (2013.01); G06F 3/0604 (2013.01); G06F 3/0619 (2013.01); G06F 3/0632 (2013.01); G06F 3/0638 (2013.01); G06F 3/0679 (2013.01); G06F 3/0688 (2013.01); G06F 9/4401 (2013.01); G06F 9/4403 (2013.01); G06F 9/4405 (2013.01); G06F 9/44505 (2013.01); G06F 11/1008 (2013.01); G06F 11/1068 (2013.01); G06F 12/0646 (2013.01); G06F 12/0692 (2013.01); G06F 12/0802 (2013.01); G06F 12/084 (2013.01); G06F 12/0806 (2013.01); G06F 12/0811 (2013.01); G06F 12/128 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G11C 29/52 (2013.01); G11C 29/802 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/1012 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/283 (2013.01); G06F 2212/452 (2013.01); G06F 2212/453 (2013.01); G06F 2212/601 (2013.01); G06F 2212/62 (2013.01); G06F 2212/69 (2013.01);
Abstract

An apparatus includes a semiconductor fuse array, a cache memory, and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is programmed the configuration data. The semiconductor fuse array has a first plurality of semiconductor fuses that is configured to store compressed cache correction data. The cache memory is disposed on the die. The plurality of cores is disposed on the die, where each of the plurality of cores is coupled to the semiconductor fuse array and the cache memory, and is configured to access the semiconductor fuse array upon power-up/reset, to decompress the compressed cache correction data, and to distribute decompressed cached correction data to initialize the cache memory.


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