The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2017
Filed:
May. 20, 2014
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Eugene Feng, San Jose, CA (US);
Mathew Arcoleo, Campbell, CA (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/08 (2016.01); G11C 29/44 (2006.01); G06F 12/10 (2016.01); G11C 7/10 (2006.01); G06F 12/0806 (2016.01); G06F 12/1081 (2016.01); G11C 29/00 (2006.01); G06F 13/28 (2006.01); G06F 12/0875 (2016.01); G06F 12/0888 (2016.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0616 (2013.01); G06F 3/0608 (2013.01); G06F 3/0655 (2013.01); G06F 3/0685 (2013.01); G06F 3/0688 (2013.01); G06F 12/0806 (2013.01); G06F 12/0875 (2013.01); G06F 12/0888 (2013.01); G06F 12/1081 (2013.01); G06F 13/28 (2013.01); G11C 7/1072 (2013.01); G11C 29/44 (2013.01); G11C 29/765 (2013.01); G06F 2212/2532 (2013.01); G06F 2212/621 (2013.01); G11C 2029/0409 (2013.01); G11C 2207/2245 (2013.01); Y02B 60/1225 (2013.01); Y02B 60/1228 (2013.01);
Abstract
The present disclosure includes methods and apparatuses for read cache memory. One apparatus includes a read cache memory apparatus comprising a first DRAM array, a first and a second NAND array, and a controller configured to manage movement of data between the DRAM array and the first NAND array, and between the first NAND array and the second NAND array.