The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2017

Filed:

Jul. 08, 2015
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Qingyu Lin, San Jose, CA (US);

Nan Zhang, Beijing, CN;

Assignee:

CADENCE DESIGN SYSTEMS, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/00 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 17/5009 (2013.01); G06F 17/5045 (2013.01);
Abstract

A system, method, and computer program product for determining whether a design for a circuit meets design specifications, to facilitate the provision of a manufacturable description of the circuit. A computer-operated circuit simulation tool reads the design for the circuit and a power specification, and selectively internally creates a network connection and inserts a corresponding connect module in the design, for at least one circuit block having an unsupported signal declared in the power specification. Typically such a circuit block will be an analog block, whether an original analog block or an analog representation of a digital block, and may involve electrical or wreal signal interactions. The simulation tool performs a mixed-signal simulation of the design. Embodiments tangibly output a verification determination from a comparison of the simulated design performance results and the design specifications in order to provide the manufacturable description of the circuit.


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