The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Mar. 28, 2014
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Moshe Teplitsky, Tel-Aviv, IL;

Michael Genossar, Modiin, IL;

Elan Banin, Raanana, IL;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/10 (2006.01); H04B 1/71 (2011.01); H04L 25/06 (2006.01); H04W 84/12 (2009.01);
U.S. Cl.
CPC ...
H04B 1/7101 (2013.01); H04B 1/1027 (2013.01); H04L 25/06 (2013.01); H04W 84/12 (2013.01);
Abstract

Logic for spur estimation of a wireless communication packet. Logic may receive an input signal output by a set of analog-to-digital converters and determine means of sequences for each of the analog-to-digital converters. The sequences may be from a preamble of the wireless communication packet. The sequences may comprise a set of short training sequences with an average zero mean received after logic detects a boundary of the sequences. The set of short training sequences may comprise a Golay sequence Ga and a Golay sequence −Ga. Logic may determine spur estimations for each of the analog-to-digital converters based upon a frequency offset estimation for the wireless communication packet. Logic may remove a mean of the spur estimations from the spur estimations. And logic may remove the spur estimations from the packet.


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