The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2017
Filed:
Aug. 04, 2016
Applicant:
Shinko Electric Industries Co., Ltd., Nagano-shi, Nagano, JP;
Inventors:
Hiroharu Yanagisawa, Nagano, JP;
Kazuhiro Kobayashi, Nagano, JP;
Assignee:
SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano-shi, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H05K 1/02 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/3178 (2013.01); H01L 23/49827 (2013.01); H01L 24/16 (2013.01); H05K 1/0213 (2013.01); H05K 1/111 (2013.01); H05K 1/181 (2013.01); H01L 2224/16227 (2013.01);
Abstract
A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the upper surface of the wiring layer is exposed from the insulating layer, and the side surface and the lower surface of the wiring layer are embedded in the insulating layer. A recess portion is formed in an outer edge portion of the upper surface of the wiring layer, and the recess portion is filled with the insulating layer.