The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Feb. 16, 2015
Applicants:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Stmicroelectronics Pte Ltd, Singapore, SG;

Inventors:

Antonino Conte, Tremestiere Etneo, IT;

Alberto Jose′ Di Martino, Palagonia, IT;

Kailash Khairnar, Leixlip, IE;

Assignees:

STMICROELECTRONICS S.R.L., Agrate Brianza (MB), IT;

STMICROELECTRONICS PTE LTD., Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 8/04 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 8/04 (2013.01); G11C 13/0004 (2013.01); G11C 13/0023 (2013.01); G11C 13/0026 (2013.01); G11C 13/0061 (2013.01); G11C 13/0097 (2013.01); G11C 2213/79 (2013.01);
Abstract

A phase change non-volatile memory device has a memory array with a plurality of memory cells arranged in rows and columns, a column decoder and a row decoder designed to select columns, and, respectively, rows of the memory array during operations of programming of corresponding memory cells. A control logic, coupled to the column decoder and the row decoder, is designed to execute a sequential programming command, to control the column decoder and row decoder to select one column of the memory array and execute sequential programming operations on a desired block of memory cells belonging to contiguous selected rows of the selected column.


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