The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Dec. 09, 2015
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Vivek Singh, Noida, IN;

Navdeep Singh Gill, Mumbai, IN;

Stephan M. Herrmann, Markt Schwaben, DE;

Sumit Mittal, Noida, IN;

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/06 (2006.01); G06F 13/16 (2006.01); G06F 13/18 (2006.01); G06F 13/00 (2006.01); G06F 13/14 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0646 (2013.01); G06F 12/0607 (2013.01); G06F 13/00 (2013.01); G06F 13/14 (2013.01); G06F 13/161 (2013.01); G06F 13/1605 (2013.01); G06F 13/1647 (2013.01); G06F 13/1652 (2013.01); G06F 13/18 (2013.01); G06F 2212/1008 (2013.01);
Abstract

A memory controller that implements an interleaving and arbitration scheme includes an address decoder that selects a memory bank for an access request based on a set of address least significant bits included in the access request. A core requiring sequential access to memory is routed to consecutive memory banks of the memory for consecutive access requests. When multiple cores request access to the same memory bank, an arbiter determines an access sequence for the cores. The arbiter can modify the access sequence without significantly increasing the complexity of the memory controller. The address decoder determines whether the selected memory banks are available and also whether an access request is a wide access request, in which case it selects two consecutive memory banks.


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