The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2017
Filed:
Sep. 26, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Raanan Sade, Kibutz Gvat, IL;
Ron Gabor, Ra'anana, IL;
Deep K. Buch, Folsom, CA (US);
Theodros Yigzaw, Sherwood, OR (US);
Stanislav Shwartsman, Haifa, IL;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 11/08 (2006.01);
U.S. Cl.
CPC ...
G06F 11/073 (2013.01); G06F 11/0793 (2013.01); G06F 11/08 (2013.01);
Abstract
Mechanisms for handling multiple data errors that occur simultaneously are provided. A processing device may determine whether multiple data errors occur in memory locations that are within a range of memory locations. If the multiple memory locations are within the range of memory locations, the processing device may continue with a recovery process. If one of the multiple memory locations is outside of the range of memory locations, the processing device may halt the recovery process.