The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2017
Filed:
Dec. 30, 2013
Nalini Vasudevan, Sunnyvale, CA (US);
Youfeng Wu, Palo Alto, CA (US);
Cheng Wang, San Ramon, CA (US);
Sara Baghsorkhi, San Jose, CA (US);
Albert Hartono, Santa Clara, CA (US);
Nalini Vasudevan, Sunnyvale, CA (US);
Youfeng Wu, Palo Alto, CA (US);
Cheng Wang, San Ramon, CA (US);
Sara Baghsorkhi, San Jose, CA (US);
Albert Hartono, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A processor includes a decoder to decode an instruction, a scheduler to schedule the instruction, and an execution unit to execute the instruction. The instruction is to load a memory operation applicable to a quantity of addresses into an execution vector. The execution vector includes a plurality of vector positions for respective addressees. The instruction is further to evaluate, for a given address in the execution vector at a vector position, whether a cache indicates that a previous memory operation was performed at a higher vector position than the vector position of the given address. The instruction is also to determine, based on the evaluation whether the cache indicates that the previous memory operation was performed at a higher vector position than the vector position of the given address, whether the memory operation will cause a memory error.