The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Dec. 10, 2015
Applicant:

Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);

Inventors:

Zhiqiang Niu, Santa Clara, CA (US);

Hua Pan, Shanghai, CN;

Ming-Chen Lu, Shanghai, CN;

Yueh-Se Ho, Sunnyvale, CA (US);

Jun Lu, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 23/495 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 25/16 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/56 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/3107 (2013.01); H01L 23/3121 (2013.01); H01L 23/3135 (2013.01); H01L 23/49503 (2013.01); H01L 23/49524 (2013.01); H01L 23/49531 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 24/17 (2013.01); H01L 24/24 (2013.01); H01L 24/73 (2013.01); H01L 24/82 (2013.01); H01L 24/92 (2013.01); H01L 25/165 (2013.01); H01L 23/5389 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/37 (2013.01); H01L 24/40 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16113 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/16258 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/24246 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/37147 (2013.01); H01L 2224/37155 (2013.01); H01L 2224/4007 (2013.01); H01L 2224/40095 (2013.01); H01L 2224/40137 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73223 (2013.01); H01L 2224/73255 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/8203 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/92226 (2013.01); H01L 2224/92244 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19104 (2013.01);
Abstract

A method of manufacturing an embedded package comprises attaching a plurality of chips on a pre-mold lead frame; forming a first lamination layer on the plurality of chips, the pre-mold lead frame and a plurality of pins; forming a first plurality of vias and a second plurality of vias through the first lamination layer; forming a respective conductive plug of a plurality of conductive plugs by depositing a respective conductive material in each of the first plurality of vias and each of the second plurality of vias; and electrically connecting the plurality of conductive plugs on the electrodes of the plurality of chips to the plurality of conductive plugs on the plurality of pins.


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