The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Jan. 13, 2014
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Chang Hsieh, Hsinchu, TW;

Ti-Wen Chen, Tainan, TW;

Yung Chun Li, New Taipei, TW;

Kuo-Pin Chang, Miaoli, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 11/56 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); H01L 27/11551 (2017.01); H01L 27/11578 (2017.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 11/5628 (2013.01); G11C 16/3459 (2013.01); G11C 16/0483 (2013.01); G11C 2211/5621 (2013.01); G11C 2216/14 (2013.01); H01L 27/11551 (2013.01); H01L 27/11578 (2013.01);
Abstract

A multiple bits per cell memory is operated by applying a one-pass, multiple-level programming, using a single pulse sequence one time (or in one-pass), such as an incremental pulse program sequence, with program verify steps for multiple target program levels, to program multiple bits per cell in a plurality of memory cells. Using these techniques, the number of program pulses required, and the time required for programming the data can be reduced. As a result, an improvement in programming throughput and a reduction in disturbance conditions are achieved. Variants of the one-pass, multiple-level programming operation can be adopted for a variety of memory cell types, memory architectures, programming speeds, and data storage densities.


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