The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

May. 24, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Larisa Novakovsky, Haifa, IL;

Joseph Nuzman, Haifa, IL;

Alexander Gendler, Kiriat Motzkin, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/0871 (2016.01); G06F 12/0897 (2016.01); G06F 12/0811 (2016.01); G06F 12/0891 (2016.01); G06F 12/0804 (2016.01); G06F 12/0837 (2016.01); G06F 12/0831 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/0804 (2013.01); G06F 12/0831 (2013.01); G06F 12/0837 (2013.01); G06F 12/0891 (2013.01); G06F 2212/283 (2013.01); G06F 2212/621 (2013.01);
Abstract

A method for determining an inclusion policy includes determining a ratio of a capacity of a large cache to a capacity of a core cache in a cache subsystem of a processor and selecting an inclusive policy as the inclusion policy for the cache subsystem in response to the cache ratio exceeding an inclusion threshold. The method may further include selecting a non-inclusive policy in response to the cache ratio not exceeding the inclusion threshold and, responsive to a cache transaction resulting in a cache miss, performing an inclusion operation that invokes the inclusion policy.


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