The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9681550 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 13, 2017

Filed:

Aug. 28, 2008
Applicant:

Joseph C. Fjelstad, Maple Valley, WA (US);

Inventor:

Joseph C. Fjelstad, Maple Valley, WA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 1/05 (2006.01); H05K 3/28 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H05K 1/185 (2013.01); H01L 2924/14 (2013.01); H01L 2924/3025 (2013.01); H05K 1/056 (2013.01); H05K 3/284 (2013.01); H05K 3/4644 (2013.01); H05K 2201/0969 (2013.01); H05K 2201/2018 (2013.01); H05K 2203/0156 (2013.01); H05K 2203/1469 (2013.01); Y10T 29/49124 (2015.01); Y10T 29/49146 (2015.01);
Abstract

A framecontaining aperture(s)is positioned on and joined to a permanent substrateor temporary substrate. Electrical component(s)are placed into respective aperture(s)with the leadsof the component(s)positioned on and attached to the permanent substrateor the temporary substrate. Then an encapsulant, electrically insulating, but preferably thermally conductive, envelops the component(s). At this point, temporary substratemay be removed exposing component leads. Or, if component(s)are mounted on permanent substrate, viasextend from the surface of substrateto leads. With leadsexposed, the completed subassemblymay be incorporated into various forms of reverse-interconnection process (RIP) assemblies as detailed in related applications.


Find Patent Forward Citations

Fjelstad, Joseph. (2017). Method of making a circuit subassembly (U.S. Patent No. 9681550). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9681550

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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