The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Dec. 16, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Amir Laufer, Petach Tiqwa, IL;

Itamar Levin, Holon, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/159 (2006.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04L 25/03885 (2013.01);
Abstract

Described is an apparatus which comprises a decision feedback equalizer (DFE) having a first DFE tap path and non-first DFE tap paths, wherein the DFE includes a variable delay circuit in a signal path of the non-first DFE tap paths. In some embodiment, an apparatus is provided which comprises: a summer; a slicer to receive input from the summer; a first feedback loop to cancel a first post-cursor, the first feedback loop forming a loop by coupling the slicer to the summer; and a second feedback loop to cancel a second post-cursor, the second feedback loop forming a loop by coupling an input of the first feedback loop to the summer, wherein the second feedback loop having a programmable delay at its input.


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