The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2017
Filed:
Jun. 03, 2016
Applicant:
Sandisk Technologies Llc, Plano, TX (US);
Inventors:
Seje Takaki, Yokkaichi, JP;
Manabu Hayashi, Yokkaichi, JP;
Akira Nakada, Yokkaichi, JP;
Ryousuke Itou, Yokkaichi, JP;
Takuro Maede, Yokkaichi, JP;
Kengo Kajiwara, Yokkaichi, JP;
Tetsuya Yamada, Yokkaichi, JP;
Assignee:
SanDisk Technologies LLC, Plano, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/24 (2006.01); H01L 29/66 (2006.01); H01L 29/51 (2006.01); H01L 45/00 (2006.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 23/528 (2006.01); H01L 29/786 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 13/00 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); G11C 13/004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); G11C 13/0069 (2013.01); G11C 16/0466 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); H01L 23/528 (2013.01); H01L 27/1157 (2013.01); H01L 27/11582 (2013.01); H01L 27/2454 (2013.01); H01L 29/41791 (2013.01); H01L 29/42392 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 29/66742 (2013.01); H01L 29/785 (2013.01); H01L 29/78642 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); G11C 2213/31 (2013.01); G11C 2213/32 (2013.01); G11C 2213/71 (2013.01); G11C 2213/75 (2013.01);
Abstract
A method is provided that includes forming a transistor by forming a first a rail gate disposed in a first direction above a substrate, forming a second rail gate disposed in a second direction above the substrate, the second direction perpendicular to the first direction, and forming a bridge section disposed between the first rail gate and the second rail gate.