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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9673109 B1

PDFFull Text
Date of Patent:
Jun. 06, 2017

Filed:

Feb. 09, 2016

Method for fabricating a semiconductor package with conductive carrier integrated heat spreader

Applicant:

Infineon Technologies Americas Corp., El Segundo, CA (US);

Inventors:

Eung San Cho, Torrance, CA (US);

Andrew N. Sawle, East Grinstead, GB;

Mark Pavier, Felbridge, GB;

Daniel Cutler, Betchworth, GB;

Assignee:

Infineon Technologies Americas Corp., El Segundo, CA (US);

Attorney:

Shumaker & Sieffert, P.A.

Primary Examiner:

Thien F Tran

Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01); H01L 21/84 (2006.01); H01L 25/00 (2006.01); H01L 23/495 (2006.01); H01L 25/18 (2006.01); H01L 23/00 (2006.01); H01L 25/07 (2006.01); H01L 25/11 (2006.01); H01L 25/16 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 21/84 (2013.01); H01L 21/4825 (2013.01); H01L 21/4871 (2013.01); H01L 21/561 (2013.01); H01L 23/3121 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 24/24 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/82 (2013.01); H01L 24/83 (2013.01); H01L 24/92 (2013.01); H01L 25/072 (2013.01); H01L 25/117 (2013.01); H01L 25/16 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/24245 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29101 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73259 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/8382 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/92224 (2013.01); H01L 2224/92244 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10323 (2013.01); H01L 2924/10325 (2013.01); H01L 2924/10334 (2013.01); H01L 2924/10341 (2013.01); H01L 2924/10344 (2013.01); H01L 2924/10346 (2013.01); H01L 2924/10355 (2013.01); H01L 2924/10356 (2013.01); H01L 2924/10357 (2013.01); H01L 2924/10358 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1426 (2013.01); H01L 2924/1815 (2013.01);
Abstract

In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage having a control drain attached to the die side of the control conductive carrier. The control conductive carrier is configured to sink heat produced by the control FET into the mounting surface. The semiconductor package includes a sync conductive carrier having another die side and another opposite I/O side connecting the semiconductor package to the mounting surface, and a sync FET of the power converter switching stage having a sync source attached to the die side of the sync conductive carrier.

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