The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

May. 31, 2012
Applicants:

Daniel M. Mccarthy, Phoenix, AZ (US);

Joseph C. Circello, Phoenix, AZ (US);

Kristen A. Hausman, Austin, TX (US);

Inventors:

Daniel M. McCarthy, Phoenix, AZ (US);

Joseph C. Circello, Phoenix, AZ (US);

Kristen A. Hausman, Austin, TX (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 9/30 (2006.01); G06F 9/38 (2006.01); G06F 9/32 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1491 (2013.01); G06F 9/30181 (2013.01); G06F 9/30189 (2013.01); G06F 9/321 (2013.01); G06F 9/3804 (2013.01); G06F 12/1441 (2013.01);
Abstract

Embodiments include processing systems that determine, based on an instruction address range indicator stored in a first register, whether a next instruction fetch address corresponds to a location within a first memory region associated with a current privilege state or within a second memory region associated with a different privilege state. When the next instruction fetch address is not within the first memory region, the next instruction is allowed to be fetched only when a transition to the different privilege state is legal. In a further embodiment, when a data access address is generated for an instruction, a determination is made, based on a data address range indicator stored in a second register, whether access to a memory location corresponding to the data access address is allowed. The access is allowed when the current privilege state is a privilege state in which access to the memory location is allowed.


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