The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Dec. 25, 2010
Applicants:

David J. Sager, Portland, OR (US);

Ruchira Sasanka, Hillsboro, OR (US);

Ron Gabor, Ra'anana, IL;

Shlomo Raikin, Geva Carmel, IL;

Joseph Nuzman, Haifa, IL;

Leeor Peled, Haifa, IL;

Jason A. Domer, Hillsboro, OR (US);

Ho-seop Kim, Portland, OR (US);

Youfeng Wu, Palo Alto, CA (US);

Koichi Yamada, Los Gatos, CA (US);

Tin-fook Ngai, San Jose, CA (US);

Howard H. Chen, Sunnyvale, CA (US);

Jayaram Bobba, Portland, OR (US);

Jeffery J. Cook, Hillsboro, OR (US);

Omar M. Shaikh, Portland, OR (US);

Suresh Srinivas, Portland, OR (US);

Inventors:

David J. Sager, Portland, OR (US);

Ruchira Sasanka, Hillsboro, OR (US);

Ron Gabor, Ra'anana, IL;

Shlomo Raikin, Geva Carmel, IL;

Joseph Nuzman, Haifa, IL;

Leeor Peled, Haifa, IL;

Jason A. Domer, Hillsboro, OR (US);

Ho-Seop Kim, Portland, OR (US);

Youfeng Wu, Palo Alto, CA (US);

Koichi Yamada, Los Gatos, CA (US);

Tin-Fook Ngai, San Jose, CA (US);

Howard H. Chen, Sunnyvale, CA (US);

Jayaram Bobba, Portland, OR (US);

Jeffery J. Cook, Hillsboro, OR (US);

Omar M. Shaikh, Portland, OR (US);

Suresh Srinivas, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01); G06F 9/38 (2006.01); G06F 9/54 (2006.01); G06F 11/36 (2006.01);
U.S. Cl.
CPC ...
G06F 8/4442 (2013.01); G06F 9/3842 (2013.01); G06F 9/3851 (2013.01); G06F 9/3861 (2013.01); G06F 9/54 (2013.01); G06F 11/3612 (2013.01); G06F 11/3636 (2013.01); G06F 11/3648 (2013.01); G06F 2213/0038 (2013.01);
Abstract

Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program into multiple parallel threads are described. In some embodiments, the systems and apparatuses execute a method of original code decomposition and/or generated thread execution.


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