The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2017

Filed:

Dec. 18, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Mukta G. Farooq, Hopewell Junction, NY (US);

John A. Fitzsimmons, Poughkeepsie, NY (US);

Spyridon Skordas, Wappingers Falls, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01B 7/31 (2006.01); H01L 21/66 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
G01B 7/31 (2013.01); H01L 22/34 (2013.01); H01L 23/544 (2013.01); H01L 2223/5442 (2013.01); H01L 2223/5446 (2013.01); H01L 2223/54426 (2013.01);
Abstract

Wafer to wafer alignment which includes a first semiconductor wafer and a second semiconductor wafer. The first and second semiconductor wafers have selectively-activated alignment arrays for aligning the first semiconductor wafer with the second semiconductor wafer. Each of the alignment arrays include an alignment structure which includes an antenna connected to a semiconductor device. The antenna in each of the alignment arrays is selectively activated to act as a charge source or as a charge sensing receptor. The alignment arrays are located in the kerf areas of the semiconductor wafers. The semiconductor wafers are aligned when the charge sources on one semiconductor wafer match with the charge sensing receptors on the other semiconductor wafer.


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