The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Apr. 15, 2015
Applicant:

Subtron Technology Co., Ltd., Hsinchu County, TW;

Inventor:

Chao-Min Wang, Hsinchu County, TW;

Assignee:

Subtron Technology Co., Ltd., Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/00 (2006.01); H05K 1/18 (2006.01); H01L 23/498 (2006.01); H01L 21/683 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H05K 1/187 (2013.01); H01L 21/4857 (2013.01); H01L 21/6835 (2013.01); H01L 23/49822 (2013.01); H05K 3/007 (2013.01); B32B 2439/00 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68381 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A manufacturing method of a package carrier is provided. A carrier having a connecting surface is provided. A releasable solder resist layer is formed on the connecting surface of the carrier and completely covers the connecting surface. A substrate having an upper surface and a lower surface opposite to each other is provided. A first patterned solder resist layer is formed on the lower surfaces of the substrate and exposes a portion of the lower surface. The carrier and the substrate are laminated, the releasable solder resist layer directly contacts the first patterned solder resist layer, and the carrier is temporarily bonded to the first patterned solder resist layer through the releasable solder resist layer.


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