The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Jun. 29, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jagdish Chand Goyal, Bangalore, IN;

Krishnaswamy Thiagarajan, Bangalore, IN;

Jayawardan Janardhanan, Bellevue, WA (US);

Srikanth Manian, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/40 (2015.01); H03L 7/107 (2006.01); H03L 7/197 (2006.01);
U.S. Cl.
CPC ...
H04B 1/40 (2013.01); H03L 7/1075 (2013.01); H03L 7/1976 (2013.01);
Abstract

A frequency synthesizer that includes a reference frequency scaler and a phase locked loop (PLL) coupled to the reference frequency scaler. The reference frequency scaler is configured to generate a first reference frequency and a second reference frequency. The PLL is configured to generate a first output frequency based on the first reference frequency during a first timeslot and a second output frequency based on the second reference frequency during a second timeslot. The PLL comprises a loop filter that includes a first switch connected in series to a first capacitor and configured to close during the first timeslot and a second switch connected in series to a second capacitor and configured to open during the first timeslot.


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