The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Sep. 01, 2015
Applicants:

Michael Rohleder, Unterschleissheim, DE;

Stefan Doll, Munich, DE;

Peter Limmer, Munich, DE;

Inventors:

Michael Rohleder, Unterschleissheim, DE;

Stefan Doll, Munich, DE;

Peter Limmer, Munich, DE;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); G06F 11/07 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G06F 11/079 (2013.01); G06F 11/0727 (2013.01); H03K 19/20 (2013.01);
Abstract

A bit storage device, integrated circuit, and method are provided. The bit storage device comprises registers to store an actual value, an inverse value, a differential actual value, and a differential inverse value, a validation circuit including validation inputs coupled to outputs of the registers and including a validity output to provide a validity indication, and a write circuit including write circuit inputs coupled to the registers, the write circuit configured to cause, at a first clock edge, the first register to store the actual value and either the second register to store the inverse value or the fourth register to store the differential inverse value, and, at a second clock edge, the third register to store the differential actual value and the other of the second register and the fourth register to store to store the inverse value or the differential inverse value, respectively.


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