The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Jul. 29, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Telesphor Kamgaing, Chandler, AZ (US);

Valluri R. Rao, Saratoga, CA (US);

Georgios Yorgos Palaskas, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01S 19/53 (2010.01); H01Q 3/30 (2006.01); H01Q 1/22 (2006.01); H01Q 9/04 (2006.01); H01Q 21/06 (2006.01); H01Q 23/00 (2006.01); H01L 23/66 (2006.01); H01L 25/065 (2006.01); H01L 25/16 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
H01Q 3/30 (2013.01); H01L 23/66 (2013.01); H01L 25/0657 (2013.01); H01L 25/16 (2013.01); H01Q 1/2283 (2013.01); H01Q 9/0414 (2013.01); H01Q 21/065 (2013.01); H01Q 23/00 (2013.01); H01L 25/18 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2924/15321 (2013.01); Y10T 29/49004 (2015.01); Y10T 29/49018 (2015.01);
Abstract

An apparatus includes a die with through-silicon vias and radio frequency integrated circuit capabilities and it is vertically integrated with a phased-array antenna substrate. The through-silicon via and a radio frequency integrated circuit is coupled to a plurality of antenna elements disposed on the phased-array antenna substrate where each of the plurality of antenna elements is coupled to the through-silicon vias and radio frequency integrated circuit through a plurality of through-silicon vias. A process of assembling the through-silicon vias and radio frequency integrated circuit to the phased-array antenna substrate includes testing the apparatus.


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