The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Sep. 03, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

I-Ming Tseng, Kaohsiung, TW;

Wen-An Liang, Tainan, TW;

Chen-Ming Huang, Taipei, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 23/535 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/161 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 23/535 (2013.01); H01L 29/0653 (2013.01); H01L 29/161 (2013.01); H01L 29/1608 (2013.01); H01L 29/6681 (2013.01); H01L 29/66515 (2013.01); H01L 29/7851 (2013.01);
Abstract

A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.


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