The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Dec. 02, 2013
Applicant:
Silergy Semiconductor Technology (Hangzhou) Ltd, Hangzhou, ZheJiang Province, CN;
Inventor:
Xiaochun Tan, Hangzhou, CN;
Assignee:
Silergy Semiconductor Technology (Hangzhou) LTD, Hangzhou, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76885 (2013.01); H01L 23/3192 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 2224/0332 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0348 (2013.01); H01L 2224/0361 (2013.01); H01L 2224/0391 (2013.01); H01L 2224/03334 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05082 (2013.01); H01L 2224/05083 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/1147 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13007 (2013.01); H01L 2224/13014 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/13018 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13118 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/81191 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13062 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/351 (2013.01);
Abstract
Disclosed herein are various chip packaging structures and methods of fabrication. In one embodiment, a flip chip package structure can include: (i) a pad on a chip; (ii) an isolation layer on the chip and the pad, where the isolation layer includes a through hole that exposes a portion of an upper surface of the pad; (iii) a metal layer on the pad, where the metal layer fully covers the exposed upper surface portion of the pad; and (iv) a bump on the metal layer, where side edges of the bump do not make contact with the isolation layer.