The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Jul. 16, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Shih-Chin Lin, Hsinchu County, TW;

Kuei-Chun Hung, Hsinchu, TW;

Jerry Che Jen Hu, Taipei, TW;

Ming-Jui Chen, Tainan, TW;

Chen-Hsien Hsu, Hsinchu County, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 21/76895 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H01L 29/7851 (2013.01);
Abstract

An integrated circuits structure includes a semiconductor substrate, at least an non-planar field effect transistor (FET) device formed on the semiconductor substrate, and an interconnection structure formed on the semiconductor substrate. The non-planar FET device includes a plurality of fins and a gate electrode. The interconnection structure includes a plurality of first group metals and a plurality of second group metals. The first group metals are formed on the non-planar FET and the second group metals are formed on the first group metals. The first group metals include a first metal pitch and the second group metals include a second metal pitch. The second metal pitch is 1.2-1.5 times to the first metal pitch.


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