The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Jun. 22, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Haining Yang, San Diego, CA (US);

Yanxiang Liu, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 21/02 (2006.01); G05B 19/418 (2006.01); H01L 27/11 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02 (2013.01); G05B 19/418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 27/11 (2013.01); H01L 27/1104 (2013.01); H01L 27/1211 (2013.01); H01L 29/785 (2013.01); G05B 2219/45031 (2013.01);
Abstract

In a particular aspect, an integrated circuit includes a first gate structure coupled to a first fin field effect transistor (FinFET) device. The integrated circuit includes a second gate structure coupled to a second FinFET device. The first gate structure and the second gate structure are separated by a dielectric region. The integrated circuit further includes a metal contact having a first surface that is in contact with the dielectric region, the first gate structure, and the second gate structure.


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