The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Jun. 30, 2014
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Shahid Ali, Bangalore, IN;
Shivraj Dharne, Bangalore, IN;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 12/06 (2006.01);
U.S. Cl.
CPC ...
G06F 13/28 (2013.01); G06F 13/4068 (2013.01); G06F 13/4221 (2013.01); G06F 12/06 (2013.01);
Abstract
Pipelining is included inside a register file memory. A register file memory device includes a static bitcell, and pipelined combinational logic. The combinational logic pipeline couples the I/O (input/output) node to the static bitcell. The pipeline includes multiple stages, where each stage includes a static logic element and a register element, where the operation of each stage transfers data through to a subsequent stage. The number of stages can be different for a read than a write. The multiple stages perform the operations to execute the read or write request.