The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Dec. 23, 2014
Roger Gramunt, Portland, OR (US);
Ramon Matas, Portland, OR (US);
Benjamin C. Chaffin, Portland, OR (US);
Neal S. Moyer, Hillsboro, OR (US);
Rammohan Padmanabhan, Beaverton, OR (US);
Alexey P. Suprun, Beaverton, OR (US);
Matthew G. Smith, Santa Clara, CA (US);
Roger Gramunt, Portland, OR (US);
Ramon Matas, Portland, OR (US);
Benjamin C. Chaffin, Portland, OR (US);
Neal S. Moyer, Hillsboro, OR (US);
Rammohan Padmanabhan, Beaverton, OR (US);
Alexey P. Suprun, Beaverton, OR (US);
Matthew G. Smith, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A processor includes a logic for stateless capture of data linear addresses (DLA) during precise event based sampling (PEBS) for an out-of-order execution engine. The engine may include a PEBS unit with logic to increment a counter each time an instance of a designated micro-op is retired a reorder buffer, capture output DLA referenced by an instance of the micro-op that executes after the counter overflows, set a captured bit associated with a reorder buffer identifier for the instance of the micro-op, and store a PEBS record in a debug storage when the instance of the micro-op is retired from the reorder buffer. The designated micro-op references a DLA of a memory accessible to the processor.