The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Dec. 21, 2012
Applicants:

Ramnarayanan Muthukaruppan, Bangalore, IN;

Pradyumna Agashe, Bangalore, IN;

Uday Bhaskar Kadali, Bangalore, IN;

Jnaneshwar Madugonda, Bangalore, IN;

Inventors:

Ramnarayanan Muthukaruppan, Bangalore, IN;

Pradyumna Agashe, Bangalore, IN;

Uday Bhaskar Kadali, Bangalore, IN;

Jnaneshwar Madugonda, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G05F 1/575 (2006.01); H02M 3/07 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G06F 1/26 (2013.01); H02M 3/07 (2013.01); H02M 2003/077 (2013.01);
Abstract

Methods and systems to regulate a voltage with multiple selectable voltage regulator (VR) modes, using multiple corresponding circuits and/or a configurable circuit. The circuit may be configurable for one or more of a power-gate VR mode, a switched-capacitor VR (SCVR) mode, and a linear mode, such as a low drop-out (LDO) VR mode. A feedback controller, such as a proportional-integral-derivative (PID) controller, may configure and/or control a multi-mode VR for a selected VR mode. The feedback controller may select a VR mode based on a reference voltage and voltage ranges associated with the VR modes. The circuit may be configurable as banks of VRs, and the controller may be implemented to transition between VR modes by switching sub-banks between modes until the transition is complete.


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