The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Apr. 29, 2015
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Chanro Park, Clifton Park, NY (US);

Sukwon Hong, Albany, NY (US);

Hoon Kim, Clifton Park, NY (US);

Min Gyu Sung, Latham, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/3213 (2006.01); H01L 21/027 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823431 (2013.01); H01L 21/28088 (2013.01); H01L 21/32139 (2013.01); H01L 21/823462 (2013.01); H01L 21/823481 (2013.01);
Abstract

The present application relates to an optical planarizing layer etch process. Embodiments include forming fins separated by a dielectric layer; forming a recess in the dielectric layer on each side of each fin, each recess being for a metal gate; forming sidewall spacers on each side of each recess; depositing a high-k dielectric liner in each recess and on a top surface of each of the fins; depositing a metal liner over the high-k dielectric layer; depositing a non-conformal organic layer (NCOL) over a top surface of the dielectric layer to pinch-off a top of each recess; depositing an OPL and ARC over the NCOL; etching the OPL, ARC and NCOL over a portion of the dielectric layer and recesses in a first region; and etching the portion of the recesses to remove residual NCOL present at a bottom of each recess of the portion of the recesses.


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