The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Jun. 19, 2013
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Christopher J. Hughes, Santa Clara, CA (US);

Daehyun Kim, San Jose, CA (US);

Jong Soo Park, Santa Clara, CA (US);

Richard M. Yoo, Stanford, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0831 (2016.01); G06F 12/0813 (2016.01); G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0831 (2013.01); G06F 12/0813 (2013.01); G06F 12/0817 (2013.01); Y02B 60/1225 (2013.01);
Abstract

Technologies for dynamic home tile mapping are described. an address request can be received from a processing core, the processing core being associated with a home tile table, the home tile table including respective mappings of one or more directory addresses to one or more home tiles. A buffer can be scanned to identify a presence of the address within the buffer. Based on an identification of the presence of the address within the buffer, a home tile identifier corresponding to the address can be provided from the buffer.


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