The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Dec. 05, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Michael A. Julier, Hillsboro, OR (US);

Jeffrey D. Gray, Portland, OR (US);

Srinivas Chennupaty, Portland, OR (US);

Sean P. Mirkes, Beaverton, OR (US);

Mark P. Seconi, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 9/38 (2006.01); G06F 7/06 (2006.01); G06F 12/0875 (2016.01); G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30145 (2013.01); G06F 7/06 (2013.01); G06F 9/30 (2013.01); G06F 9/3001 (2013.01); G06F 9/3013 (2013.01); G06F 9/3017 (2013.01); G06F 9/30021 (2013.01); G06F 9/30029 (2013.01); G06F 9/30036 (2013.01); G06F 9/30098 (2013.01); G06F 9/30109 (2013.01); G06F 9/30167 (2013.01); G06F 9/30185 (2013.01); G06F 9/30192 (2013.01); G06F 9/3802 (2013.01); G06F 9/3853 (2013.01); G06F 9/3887 (2013.01); G06F 12/0875 (2013.01); G06F 9/34 (2013.01); G06F 9/3824 (2013.01); G06F 9/3885 (2013.01); G06F 2212/452 (2013.01);
Abstract

A processor includes a decoder logic to decode a compare instruction, and an execution unit to execute the compare instruction. The compare instruction is to cause the processor to compare integer data elements of a first 64-bit SIMD integer operand with integer data elements of a second 64-bit SIMD integer operand. The integer data elements of the first 64-bit SIMD integer operand to be compared with the integer data elements of the second 64-bit SIMD integer operand are to be in same data element positions. The compare instruction is also to cause the processor to store a plurality of indicators of whether the compared integer data elements of the first and second 64-bit SIMD integer operands are equal. The plurality of indicators are expanded data elements, each of a first multi-bit size.


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