The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2017
Filed:
Sep. 26, 2014
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Bryan E. Veal, Beaverton, OR (US);
Dan J. Williams, Forest Grove, OR (US);
Annie Foong, Aloha, OR (US);
Assignee:
INTEL CORPORATION, Santa Clara, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0608 (2013.01); G06F 3/064 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 12/0292 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/251 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7207 (2013.01);
Abstract
One embodiment provides a computing device. The computing device includes a processor; a chipset; a memory; and indirection logic. The indirection logic is to receive a host logical block address (LBA) associated with a first sector of data, map the host LBA from a host address space to a first device LBA in a device address space, the device address space related to a non-volatile memory (NVM) storage device physical memory address space, and provide the first sector of data and the first device LBA to the NVM storage device.