The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2017
Filed:
Jun. 01, 2016
Freescale Semiconductor, Inc., Austin, TX (US);
Venkataram Mooraka, Austin, TX (US);
Firas Abughazaleh, Austin, TX (US);
Roby Thomas, Austin, TX (US);
NXP USA, INC., Austin, TX (US);
Abstract
A duty cycle correction circuit has a delay line comprising a plurality of current-starved inverters coupled together in series. An input of a first current-starved inverter receives an input clock signal. A relatively weak inverter is coupled in parallel with each of the current-starved inverters. A low pass filter having an operational amplifier has a differential input coupled to the output of the delay line for receiving an output clock signal. A single-ended output of the operational amplifier is coupled to current source and current sink transistors of each of the current-starved inverters to control the amount of delay provided by the delay line. The low pass filter corrects the duty cycle of the input clock signal so that the output clock signal has a 50 percent duty cycle. The relatively weak parallel-connected inverters insure that no clock pulses are skipped if the current-starved inverters fail to transition.