Asymmetrical finfet structure and method of manufacturing same

Abstract

A method of fabricating an asymmetric FinFET is provided in the invention, comprising: a. providing a substrate (); b. forming a fin () on the substrate (), wherein the width of the fin () is defined as a second channel thickness; c. forming a shallow trench isolation; d. forming a sacrificial gate stack on the top surface and sidewalls of the channel which is in the middle of the fin, and forming source/drain regions in both ends of the fin; e. depositing an interlayer dielectric layer to cover the sacrificial gate stack and the source/drain regions, planarizing the interlayer dielectric layer to expose sacrificial gate stack; f. removing the sacrificial gate stack to expose the channel; g. forming an etch-stop layer () on top of the channel; h. covering a photoresist film () on a portion of the semiconductor structure near the source region; i. thinning the channel which is not covered by the photoresist layer () from both direction vertical to the channel sidewalls until a first channel thickness obtained; j. removing the etch-stop layer (). Harmful short channel effects can be restrained and device performance can be enhanced.