The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Apr. 09, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Seokhyun Lee, Hwaseong-si, KR;

Chul-Yong Jang, Suwon-si, KR;

Jongho Lee, Hwaseong-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 25/10 (2006.01); H01L 23/13 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 23/13 (2013.01); H01L 23/3107 (2013.01); H01L 23/367 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 21/565 (2013.01); H01L 23/49816 (2013.01); H01L 23/49838 (2013.01); H01L 23/5385 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/06135 (2013.01); H01L 2224/16113 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/92125 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06589 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2225/1088 (2013.01); H01L 2225/1094 (2013.01); H01L 2924/15159 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01);
Abstract

Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first package having a first package substrate mounted with a lower semiconductor chip, and a second package having a second package substrate mounted with upper semiconductor chips. The second package substrate includes a chip region on which the upper semiconductor chips are mounted, and a connection region provided therearound. The chip region includes a first surface defining a first recess region and a second surface defining a first protruding portion. The upper semiconductor chips are mounted on opposite edges of the second surface and spaced apart from each other to have portions protruding toward the connection region beyond the chip region.


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