The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

Oct. 28, 2016
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Tae-Kyung Oh, Gyeonggi-do, KR;

Jin-Yul Lee, Gyeonggi-do, KR;

Eun-Jeong Kim, Gyeonggi-do, KR;

Dong-Soo Kim, Gyeonggi-do, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H01L 29/49 (2006.01); H01L 21/28 (2006.01); H01L 27/108 (2006.01); H01L 27/24 (2006.01); H01L 27/22 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4966 (2013.01); H01L 21/28088 (2013.01); H01L 27/10814 (2013.01); H01L 27/228 (2013.01); H01L 27/2436 (2013.01); H01L 29/4236 (2013.01);
Abstract

A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.


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