The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

Jun. 21, 2016
Applicant:

Kilopass Technology, Inc., San Jose, CA (US);

Inventors:

Jeong-Duk Sohn, San Ramon, CA (US);

Steve Wang, Fremont, CA (US);

Charlie Cheng, Los Altos, CA (US);

Assignee:

Kilopass Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 7/06 (2006.01); G11C 7/22 (2006.01); G11C 7/12 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/065 (2013.01); G11C 7/106 (2013.01); G11C 7/12 (2013.01); G11C 7/22 (2013.01);
Abstract

A circuit arrangement and method of reading the logic state of a memory cell in an array of semiconductor memory cells. A data memory cell selected from the array drives a current on a first data bit line in a read operation. A reference memory cell corresponding to the memory cell is activated after the memory cell is selected, the reference memory cell driving a current through the reference data line at a greater rate than that of the corresponding memory cell regardless of the logic state of the memory cell. A sense amplifier connected to the data line and a reference data line determines the logic state of the selected memory cell. A delay circuit activates the reference memory cell after the memory cell is selected and enables the sense amplifier after the reference memory cell has been activated. The circuit arrangement further has a latch connected to an output of the sense amplifier, the latch capturing the output from the sense amplifier when the sense amplifier determines the logic state of the selected memory cell and sending a signal to the sense amplifier to disable itself.


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