The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2017

Filed:

Aug. 12, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Praful Jain, Los Gatos, CA (US);

Michael J. Hart, Palo Alto, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H01L 27/118 (2006.01); H03K 19/177 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018571 (2013.01); H01L 27/11803 (2013.01); H03K 19/1737 (2013.01); H03K 19/1776 (2013.01); H03K 19/17736 (2013.01);
Abstract

An exemplary interconnect circuit for a programmable integrated circuit (IC) includes an input terminal coupled to receive from a node in the programmable IC, an output terminal coupled to transmit towards another node in the programmable IC, first and second control terminals coupled to receive from a memory cell of the programmable IC, and a complementary metal oxide semiconductor (CMOS) pass-gate coupled between the input terminal and the output terminal and to the first and second control terminals. The CMOS pass-gate includes a P-channel transistor configured with a low threshold voltage for a CMOS process used to fabricate the programmable IC.


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