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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9627409 B1

PDFFull Text
Date of Patent:
Apr. 18, 2017

Filed:

Dec. 29, 2015

Semiconductor device with thin-film resistor

Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Hans-Peter Moll, Dresden, DE;

Andrei Sidelnicov, Dresden, DE;

Maciej Wiatr, Dresden, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:

Amerson Law Firm, PLLC

Primary Examiner:

Michael Lebentritt

Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 27/12 (2006.01); H01L 49/02 (2006.01); H01L 29/786 (2006.01); H01L 29/06 (2006.01); H01L 21/768 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 21/8258 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1207 (2013.01); H01L 21/762 (2013.01); H01L 21/76898 (2013.01); H01L 21/8258 (2013.01); H01L 28/20 (2013.01); H01L 29/0649 (2013.01); H01L 29/66757 (2013.01); H01L 29/78603 (2013.01); H01L 29/78675 (2013.01);
Abstract

A semiconductor device with a metal-containing layer, a first semiconductor layer, that is formed on top of the metal-containing layer, and a resistor that is formed in the metal-containing layer and that is contacted through the first semiconductor layer is provided. Furthermore, a method of manufacturing a semiconductor device is provided, wherein the method comprises manufacturing of a resistor with the following steps: formation of a metal-containing layer over a wafer, particularly a SOI wafer, formation of a first semiconductor layer on top of the metal-containing layer and formation of a contact through the semiconductor layer to the metal-containing layer.

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