The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2017

Filed:

Apr. 13, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chia-Hua Chu, Hsinchu County, TW;

Chun-Wen Cheng, Hsinchu County, TW;

Jiou-Kang Lee, Hsinchu, TW;

Kai-Chih Liang, Hsinchu County, TW;

Chung-Hsien Lin, Hsinchu, TW;

Te-Hao Lee, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00269 (2013.01); B81C 1/00039 (2013.01); B81C 1/00261 (2013.01); B81B 2201/0235 (2013.01); B81B 2201/0242 (2013.01); B81B 2201/0257 (2013.01); B81B 2203/0307 (2013.01); B81B 2207/012 (2013.01); B81C 2203/035 (2013.01);
Abstract

Exemplary microelectromechanical system (MEMS) devices, and methods for fabricating such are disclosed. An exemplary method includes providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate includes a first silicon layer separated from a second silicon layer by an insulator layer; processing the first silicon layer to form a first structure layer of a MEMS device; bonding the first structure layer to a substrate; and processing the second silicon layer to form a second structure layer of the MEMS device.


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