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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9615461 B1

PDFFull Text
Date of Patent:
Apr. 04, 2017

Filed:

May. 23, 2016

Wiring module including wiring substrate having border portion separating two side metallic foils and manufacturing method of wiring module

Applicant:

Shinko Electric Industries Co., Ltd., Nagano, JP;

Inventors:

Atsushi Nakamura, Nagano, JP;

Tsukasa Nakanishi, Nagano, JP;

Takayuki Matsumoto, Nagano, JP;

Assignee:

SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano, JP;

Attorney:

IPUSA, PLLC

Primary Examiner:

Tremesha S Willis

Int. Cl.
CPC ...
H05K 7/00 (2006.01); H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 3/42 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 33/54 (2010.01); H01L 33/62 (2010.01); H05K 1/02 (2006.01); H05K 1/03 (2006.01); H05K 1/09 (2006.01); H01L 33/48 (2010.01); H05K 1/05 (2006.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); H01L 23/3107 (2013.01); H01L 23/49541 (2013.01); H01L 24/49 (2013.01); H01L 33/54 (2013.01); H01L 33/62 (2013.01); H05K 1/0296 (2013.01); H05K 1/0313 (2013.01); H05K 1/09 (2013.01); H05K 1/112 (2013.01); H05K 1/113 (2013.01); H05K 1/115 (2013.01); H05K 3/42 (2013.01); H05K 3/427 (2013.01); H01L 33/48 (2013.01); H01L 2224/13 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48245 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/14 (2013.01); H05K 1/056 (2013.01); H05K 1/189 (2013.01); H05K 2201/10106 (2013.01); H05K 2203/1545 (2013.01); Y10T 29/49165 (2015.01);
Abstract

A wiring substrate includes a resin substrate in which first and second through holes are formed, a metallic foil on one surface of the resin substrate coating the through holes and separated into first and second side metallic foils by a border, a first connecting portion formed by a plating film inside the first through hole, a second connecting portion formed by a plating film inside the second through hole, a first slit facing the border and penetrating through the metallic foil and the first connecting portion, a second slit facing the border and penetrating through the metallic foil and the second connecting portion, first and second plating layers on front surfaces of the first and second side metallic foils, bottom surfaces of the first and second connecting portions, and side surfaces inside the first and second slits of the first and second side metallic foils.

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