The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2017
Filed:
Jul. 07, 2015
United Microelectronics Corp., Hsin-Chu, TW;
Ching-Wen Hung, Tainan, TW;
Wei-Cyuan Lo, Taichung, TW;
Ming-Jui Chen, Hsinchu, TW;
Chia-Lin Lu, Taoyuan, TW;
Jia-Rong Wu, Kaohsiung, TW;
Yi-Hui Lee, Taipei, TW;
Ying-Cheng Liu, Tainan, TW;
Yi-Kuan Wu, Kaohsiung, TW;
Chih-Sen Huang, Tainan, TW;
Yi-Wei Chen, Taichung, TW;
Tan-Ya Yin, Nantou County, TW;
Chia-Wei Huang, Kaohsiung, TW;
Shu-Ru Wang, Taichung, TW;
Yung-Feng Cheng, Kaohsiung, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
The present invention provides a semiconductor structure, including a substrate, a plurality of fin structures, a plurality of gate structures, a dielectric layer and a plurality of contact plugs. The substrate has a memory region. The fin structures are disposed on the substrate in the memory region, each of which stretches along a first direction. The gate structures are disposed on the fin structures, each of which stretches along a second direction. The dielectric layer is disposed on the gate structures and the fin structures. The contact plugs are disposed in the dielectric layer and electrically connected to a source/drain region in the fin structure. From a top view, the contact plug has a trapezoid shape or a pentagon shape. The present invention further provides a method for forming the same.