The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 10, 2013
Applicant:

United Test and Assembly Center Ltd., Singapore, SG;

Inventors:

Nathapong Suthiwongsunthorn, Singapore, SG;

John Ducyao Beleran, Singapore, SG;

Serafin Padilla Pedron, Jr., Manteca, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/02 (2006.01); H01L 29/84 (2006.01); H01L 23/04 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/04 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/85 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/4569 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/45565 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/48471 (2013.01); H01L 2224/48479 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8592 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/10158 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/16151 (2013.01); H01L 2924/16152 (2013.01); H01L 2924/181 (2013.01);
Abstract

Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.


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