The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Sep. 26, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

George H. Huang, Santa Clara, CA (US);

Debaleena Das, Los Gatos, CA (US);

Brian S. Morris, Santa Clara, CA (US);

Rajat Agarwal, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G11C 29/00 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G11C 29/883 (2013.01); G06F 11/073 (2013.01); G06F 11/0751 (2013.01); G06F 11/0793 (2013.01);
Abstract

An apparatus and method are described for performing forward and reverse memory sparing operations. For example, one embodiment of a processor comprises memory sparing logic to perform a first forward memory sparing operation at a first level of granularity in response to detecting a memory failure; the memory sparing logic to perform a reverse memory sparing operation in response to a determination of an improved sparing state having a second level of granularity; and the memory sparing logic to responsively perform a second forward memory sparing operation at the second level of granularity.


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