The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

May. 13, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Davide Mantegazza, Palo Alto, CA (US);

Kiran Pangal, Fremont, CA (US);

Gerard H. Joyce, Folsom, CA (US);

Prashant Damle, Portland, OR (US);

Derchang Kau, Cupertino, CA (US);

Davide Fugazza, Sunnyvale, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0097 (2013.01); G11C 13/0004 (2013.01); G11C 13/0038 (2013.01); G11C 13/0069 (2013.01); G11C 2013/0092 (2013.01);
Abstract

Embodiments of the present disclosure describe techniques and configurations for word-line path isolation in a phase change memory (PCM) device. In an embodiment, a method includes increasing a current through a memory cell of a phase change memory (PCM) device, wherein the memory cell is coupled with a capacitor and subsequent to said increasing the current, generating a transient current through the memory cell by discharge of the capacitor to reset the memory cell. In another embodiment, a method includes increasing a current through a memory cell of a phase change memory (PCM) device and controlling the current to be greater than a threshold current and lower than a hold current of the memory cell to set the memory cell. Other embodiments may be described and/or claimed.


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