The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 12, 2015
Applicant:

The Regents of the University of California, Oakland, CA (US);

Inventors:

Andrei A. Shkel, Irvine, CA (US);

Alexandra Efimovskaya, Irvine, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); B81B 7/00 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
B81B 7/0074 (2013.01); H01L 21/02118 (2013.01); H01L 21/76877 (2013.01); H01L 21/76898 (2013.01); B81B 2207/07 (2013.01);
Abstract

A high-aspect ratio low resistance through-wafer interconnect for double-sided (TWIDS) fabrication of microelectromechanical systems (MEMS) serves as an interconnection method and structure for co-integration of MEMS and integrated circuits or other microcomponent utilizing both sides of the wafer. TWIDS applied to a three dimensional folded TIMU (timing inertial measurement unit) provides a path for electrical signals from sensors on the front side of the SOI wafer to electronic components on the back side of the wafer, while enabling folding of an array of sensors in a three dimensional shape.


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