The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

Dec. 14, 2006
Applicants:

Lee-chung LU, Taipei, TW;

Chung-hsing Wang, Baoshan Township, Hsinchu County, TW;

Chun-hui Tai, HsinChu, TW;

Li-chun Tien, Tainan, TW;

Shun-li Chen, Hsin-Chu, TW;

Inventors:

Lee-Chung Lu, Taipei, TW;

Chung-Hsing Wang, Baoshan Township, Hsinchu County, TW;

Chun-Hui Tai, HsinChu, TW;

Li-Chun Tien, Tainan, TW;

Shun-Li Chen, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 3/35613 (2013.01);
Abstract

This invention discloses a voltage level shifter, which comprises a first P-type metal-oxide-semiconductor (PMOS) transistor having a gate, a source and a bulk coupled to an input terminal, a first positive voltage power supply and a second positive voltage power supply, respectively, and a second PMOS transistor having a source, a drain and a bulk coupled to a third positive voltage power supply, an output node and the second positive voltage power supply, respectively, wherein the first and second PMOS transistors are formed in a single Nwell.


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