The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

May. 08, 2013
Applicant:

Koninklijke Philips N.v., Eindhoven, NL;

Inventors:

Jipu Lei, San Jose, CA (US);

Alexander H. Nickel, Santa Clara, CA (US);

Stefano Schiaffino, Pleasanton, CA (US);

Grigoriy Basin, San Francisco, CA (US);

Assignee:

Koninklijke Philips N.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/38 (2010.01); H01L 21/441 (2006.01); H01L 21/782 (2006.01); H01L 21/3205 (2006.01); H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 21/78 (2006.01); H01L 21/445 (2006.01); H01L 33/00 (2010.01);
U.S. Cl.
CPC ...
H01L 27/1266 (2013.01); H01L 21/0273 (2013.01); H01L 21/02697 (2013.01); H01L 21/441 (2013.01); H01L 21/445 (2013.01); H01L 21/7806 (2013.01); H01L 27/1262 (2013.01); H01L 27/1288 (2013.01); H01L 33/0062 (2013.01); H01L 33/0079 (2013.01); H01L 33/0083 (2013.01); H01L 33/38 (2013.01); H01L 33/385 (2013.01); H01L 33/0095 (2013.01); H01L 2933/0016 (2013.01);
Abstract

A method according to embodiments of the invention includes providing a wafer comprising a semiconductor structure grown on a growth substrate. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region. The wafer includes trenches defining individual semiconductor devices. The trenches extend through an entire thickness of the semiconductor structure to reveal the growth substrate. The method further includes forming a thick conductive layer on the semiconductor structure. The thick conductive layer is configured to support the semiconductor structure when the growth substrate is removed. The method further includes removing the growth substrate.


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